/* * Copyright 2018 MNT Media and Technology UG. * * This file is dual-licensed: you can use it either under the terms * of the GPL or the X11 license, at your option. Note that this dual * licensing only applies to this file, and not this project as a * whole. * * a) This file is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License * version 2 as published by the Free Software Foundation. * * This file is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. * * Or, alternatively, * * b) Permission is hereby granted, free of charge, to any person * obtaining a copy of this software and associated documentation * files (the "Software"), to deal in the Software without * restriction, including without limitation the rights to use, * copy, modify, merge, publish, distribute, sublicense, and/or * sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following * conditions: * * The above copyright notice and this permission notice shall be * included in all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #include #include / { chosen { stdout-path = &uart1; }; memory { reg = <0x10000000 0xf0000000>; }; regulators { compatible = "simple-bus"; #address-cells = <1>; #size-cells = <0>; reg_usb_otg_vbus: regulator@0 { compatible = "regulator-fixed"; reg = <0>; regulator-name = "usb_otg_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; enable-active-high; }; reg_usb_h1_vbus: regulator@1 { compatible = "regulator-fixed"; reg = <1>; regulator-name = "usb_h1_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; regulator-always-on; enable-active-high; }; reg_1p5v: regulator@2 { compatible = "regulator-fixed"; reg = <2>; regulator-name = "1P5V"; regulator-min-microvolt = <1500000>; regulator-max-microvolt = <1500000>; regulator-always-on; }; reg_2p5v: regulator@3 { compatible = "regulator-fixed"; reg = <3>; regulator-name = "2P5V"; regulator-min-microvolt = <2500000>; regulator-max-microvolt = <2500000>; regulator-always-on; }; reg_3p3v: regulator@4 { compatible = "regulator-fixed"; reg = <4>; regulator-name = "3P3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; }; leds { compatible = "gpio-leds"; }; sound { compatible = "fsl,sgtl5000", "fsl,imx-audio-sgtl5000"; model = "imx6qp-mntreform-sgtl5000"; ssi-controller = <&ssi1>; audio-codec = <&codec>; audio-routing = "MIC_IN", "Mic Jack", "Mic Jack", "Mic Bias", "Headphone Jack", "HP_OUT"; //micbias-resistor-k-ohms = <2>; //micbias-voltage-m-volts = <2250>; //clocks = <&clks 150>; mux-int-port = <1>; mux-ext-port = <4>; lrclk-strength = <3>; }; backlight_lvds0: backlight-lvds0 { compatible = "pwm-backlight"; pwms = <&pwm1 0 5000000>; brightness-levels = <0 4 8 16 32 64 128 255>; default-brightness-level = <4>; power-supply = <®_3p3v>; status = "okay"; }; }; &audmux { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_audmux>; status = "okay"; }; /* The following clocks can be the parent of ldb_di_sel clock: { "pll5_video_div", "pll2_pfd0_352m", "pll2_pfd2_396m", "mmdc_ch1_axi", "pll3_usb_otg", }; See: https://community.nxp.com/thread/306801 */ &clks { assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>; assigned-clock-parents = <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, <&clks IMX6QDL_CLK_PLL2_PFD2_396M>; }; &ecspi1 { cs-gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_ecspi1>; status = "okay"; flash: m25p80@0 { compatible = "microchip,sst25vf016b"; spi-max-frequency = <20000000>; reg = <0>; }; }; &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; phy-mode = "rgmii"; phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; fsl,magic-packet; status = "okay"; }; /* * Copied from imx6q-utilite-pro.dts: forces HDMI to IPU2 */ /delete-node/&ipu1_di0_hdmi; /delete-node/&hdmi_mux_0; /delete-node/&ipu1_di1_hdmi; /delete-node/&hdmi_mux_1; &hdmi { ddc-i2c-bus = <&i2c1>; status = "okay"; }; &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; }; &i2c2 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; }; &i2c3 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c3>; status = "okay"; codec: sgtl5000@0a { compatible = "fsl,sgtl5000"; reg = <0x0a>; clocks = <&clks IMX6QDL_CLK_CKO>; VDDA-supply = <®_3p3v>; VDDIO-supply = <®_3p3v>; VDDD-supply = <®_1p5v>; }; }; &iomuxc { mntreform { pinctrl_hog: hoggrp { fsl,pins = < MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x80000000 /* USB0 Pwr */ MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 /* USB1 Pwr */ // tinyrex stuff MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 0x80000000 /* CPU Gpio 0 */ MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 /* CPU Gpio 1 */ >; }; pinctrl_audmux: audmuxgrp { fsl,pins = < MX6QDL_PAD_SD2_DAT0__AUD4_RXD 0x130b0 MX6QDL_PAD_SD2_DAT3__AUD4_TXC 0x130b0 MX6QDL_PAD_SD2_DAT2__AUD4_TXD 0x110b0 MX6QDL_PAD_SD2_DAT1__AUD4_TXFS 0x130b0 MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0 /* AUD4_MCK */ >; }; pinctrl_ecspi1: ecspi1grp { fsl,pins = < MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x000b1 >; }; pinctrl_enet: enetgrp { fsl,pins = < MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x0001b0b0 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x0001b0b0 MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x0001b0b0 MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x0001b0b0 MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x0001b0b0 MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x0001b0b0 MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x0001b0b0 MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x0001b0b0 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x0001b0b0 MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x0001b0b0 MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x0001b0b0 MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x0001b0b0 MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x0001b0b0 MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x0001b0b0 MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x0001b0b0 MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x80000000 /* PHY Int */ MX6QDL_PAD_ENET_RXD1__GPIO1_IO26 0x80000000 /* PHY Int */ MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x00000831 /* PHY Reset */ >; }; pinctrl_i2c1: i2c1grp { fsl,pins = < MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1 MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1 MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1 >; }; pinctrl_i2c3: i2c3grp { fsl,pins = < MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1 MX6QDL_PAD_GPIO_16__I2C3_SDA 0x4001b8b1 >; }; pinctrl_pcie: pciegrp { fsl,pins = < MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* Wake */ MX6QDL_PAD_EIM_A25__GPIO5_IO02 0x80000000 /* Reset */ >; }; pinctrl_lvds: lvdsgrp { fsl,pins = < MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x80000000 /* LVDS CABC */ MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x80000000 /* LVDS Pwm */ >; }; pinctrl_pwm1: pwm1grp { fsl,pins = < MX6QDL_PAD_DISP0_DAT8__PWM1_OUT 0x0001b0b1 >; }; pinctrl_pwm2: pwm2grp { fsl,pins = < MX6QDL_PAD_DISP0_DAT9__PWM2_OUT 0x0001b0b1 >; }; pinctrl_pwm3: pwm3grp { fsl,pins = < MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x0001b0b1 >; }; pinctrl_pwm4: pwm4grp { fsl,pins = < MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x0001b0b1 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1 MX6QDL_PAD_SD3_DAT6__UART1_RX_DATA 0x1b0b1 >; }; pinctrl_uart2: uart2grp { fsl,pins = < MX6QDL_PAD_SD3_DAT5__UART2_TX_DATA 0x1b0b1 MX6QDL_PAD_SD3_DAT4__UART2_RX_DATA 0x1b0b1 >; }; pinctrl_usbotg: usbotggrp { fsl,pins = < MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059 >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX6QDL_PAD_SD3_CMD__SD3_CMD 0x00017059 MX6QDL_PAD_SD3_CLK__SD3_CLK 0x00010059 MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x00017059 MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x00017059 MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x00017059 MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x00017059 MX6QDL_PAD_SD3_RST__GPIO7_IO08 0x80000000 /* CD */ MX6QDL_PAD_NANDF_CS3__GPIO6_IO16 0x80000000 /* WP */ >; }; }; }; &pcie { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pcie>; reset-gpio = <&gpio5 2 0>; status = "okay"; }; &sata { status = "okay"; }; &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm1>; status = "okay"; }; &pwm2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm2>; status = "okay"; }; &pwm3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm3>; status = "okay"; }; &pwm4 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pwm4>; status = "okay"; }; &ssi1 { status = "okay"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; &uart2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart2>; status = "okay"; }; &usbh1 { vbus-supply = <®_usb_h1_vbus>; status = "okay"; }; &usbotg { vbus-supply = <®_usb_otg_vbus>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg>; disable-over-current; srp-disable; hnp-disable; adp-disable; status = "okay"; }; &usbphy1 { tx-d-cal = <0x5>; }; &usbphy2 { tx-d-cal = <0x5>; }; &usdhc3 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc3>; bus-width = <4>; cd-gpios = <&gpio7 8 GPIO_ACTIVE_HIGH>; wp-gpios = <&gpio6 16 GPIO_ACTIVE_LOW>; non-removable; no-1-8-v; keep-power-in-suspend; status = "okay"; //wp-inverted; }; &ldb { status = "okay"; lvds-channel@0 { status = "ok"; fsl,data-width = <18>; fsl,data-mapping = "spwg"; display-timings { native-mode = <&timing0>; timing0: 1366x768 { clock-frequency = <70000000>; hactive = <1368>; /* or fb0 doesn't work on imx-drm */ vactive = <768>; hback-porch = <84>; hfront-porch = <36>; vback-porch = <14>; vfront-porch = <3>; hsync-len = <40>; vsync-len = <5>; }; }; }; };