/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright 2019 NXP */ #ifndef __IMX8MM_EVK_H #define __IMX8MM_EVK_H #include #include #include #define UBOOT_ITB_OFFSET 0x57C00 #define FSPI_CONF_BLOCK_SIZE 0x1000 #define UBOOT_ITB_OFFSET_FSPI \ (UBOOT_ITB_OFFSET + FSPI_CONF_BLOCK_SIZE) #ifdef CONFIG_FSPI_CONF_HEADER #define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + UBOOT_ITB_OFFSET_FSPI) #else #define CFG_SYS_UBOOT_BASE \ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512) #endif #ifdef CONFIG_SPL_BUILD /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */ #define CFG_MALLOC_F_ADDR 0x930000 /* For RAW image gives a error info not panic */ #endif #define BOOT_TARGET_DEVICES(func) \ func(MMC, mmc, 1) \ func(MMC, mmc, 2) \ func(DHCP, dhcp, na) #include /* Initial environment variables */ #define CFG_EXTRA_ENV_SETTINGS \ BOOTENV \ "scriptaddr=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "kernel_addr_r=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \ "image=Image\0" \ "console=ttymxc1,115200\0" \ "fdt_addr_r=0x43000000\0" \ "boot_fit=no\0" \ "fdtfile=imx8mm-evk.dtb\0" \ "initrd_addr=0x43800000\0" \ "bootm_size=0x10000000\0" \ "mmcpart=1\0" \ "mmcroot=/dev/mmcblk1p2 rootwait rw\0" \ /* Link Definitions */ #define CFG_SYS_INIT_RAM_ADDR 0x40000000 #define CFG_SYS_INIT_RAM_SIZE 0x200000 #define CFG_SYS_SDRAM_BASE 0x40000000 #define PHYS_SDRAM 0x40000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ #define CFG_FEC_MXC_PHYADDR 0 #endif