// SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2018 NXP */ #include #include #include #include #include #include #include #include #include DECLARE_GLOBAL_DATA_PTR; static int setup_fec(void) { struct iomuxc_gpr_base_regs *gpr = (struct iomuxc_gpr_base_regs *)IOMUXC_GPR_BASE_ADDR; /* Use 125MHz anatop REF_CLK1 for ENET1, not from external */ clrsetbits_le32(&gpr->gpr[1], 0x2000, 0); return 0; } int board_init(void) { setup_fec(); return 0; } int board_late_init(void) { if (IS_ENABLED(CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG)) { env_set("board_name", "PHG"); env_set("board_rev", "iMX8MM"); } if (is_usb_boot()) { env_set("bootcmd", "ums 0 mmc 0"); env_set("bootdelay", "0"); } return 0; }