// SPDX-License-Identifier: GPL-2.0 /* * Copyright (c) 2021 MediaTek Inc. * Author: Sam Shih */ /dts-v1/; #include "mt7986.dtsi" #include / { #address-cells = <1>; #size-cells = <1>; model = "BananaPi BPi-R3"; compatible = "mediatek,mt7986", "mediatek,mt7986-sd-rfb"; chosen { stdout-path = &uart0; tick-timer = &timer0; }; memory@40000000 { device_type = "memory"; reg = <0x40000000 0x80000000>; }; reg_3p3v: regulator-3p3v { compatible = "regulator-fixed"; regulator-name = "fixed-3.3V"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; }; keys { compatible = "gpio-keys"; factory { label = "reset"; gpios = <&gpio 9 GPIO_ACTIVE_LOW>; }; wps { label = "wps"; gpios = <&gpio 10 GPIO_ACTIVE_LOW>; }; }; leds { compatible = "gpio-leds"; led_status_green: green { label = "green:status"; gpios = <&gpio 69 GPIO_ACTIVE_HIGH>; }; led_status_blue: blue { label = "blue:status"; gpios = <&gpio 86 GPIO_ACTIVE_HIGH>; }; }; }; &uart0 { status = "okay"; }; &uart1 { pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>; status = "disabled"; }; ð { status = "okay"; mediatek,gmac-id = <0>; phy-mode = "2500base-x"; mediatek,switch = "mt7531"; reset-gpios = <&gpio 5 GPIO_ACTIVE_HIGH>; fixed-link { speed = <2500>; full-duplex; }; }; &pinctrl { spic_pins: spi1-pins-func-1 { mux { function = "spi"; groups = "spi1_2"; }; }; uart1_pins: spi1-pins-func-3 { mux { function = "uart"; groups = "uart1_2"; }; }; pwm_pins: pwm0-pins-func-1 { mux { function = "pwm"; groups = "pwm0"; }; }; mmc0_pins_default: mmc0default { mux { function = "flash"; groups = "emmc_51"; }; conf-cmd-dat { pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2", "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5", "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD"; input-enable; drive-strength = ; bias-pull-up = ; }; conf-clk { pins = "EMMC_CK"; drive-strength = ; bias-pull-down = ; }; conf-dsl { pins = "EMMC_DSL"; bias-pull-down = ; }; conf-rst { pins = "EMMC_RSTB"; drive-strength = ; bias-pull-up = ; }; }; spi_flash_pins: spi0-pins-func-1 { mux { function = "flash"; groups = "spi0", "spi0_wp_hold"; }; conf-pu { pins = "SPI2_CS", "SPI2_HOLD", "SPI2_WP"; drive-strength = ; bias-pull-up = ; }; conf-pd { pins = "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO"; drive-strength = ; bias-pull-down = ; }; }; }; &pwm { pinctrl-names = "default"; pinctrl-0 = <&pwm_pins>; status = "okay"; }; &spi0 { #address-cells = <1>; #size-cells = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi_flash_pins>; status = "okay"; must_tx; enhance_timing; dma_ext; ipm_design; support_quad; tick_dly = <1>; sample_sel = <0>; spi_nor@0 { compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <52000000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "bl2"; reg = <0x0 0x40000>; }; partition@40000 { label = "u-boot-env"; reg = <0x40000 0x40000>; }; partition@80000 { label = "reserved"; reg = <0x80000 0x80000>; }; partition@100000 { label = "fip"; reg = <0x100000 0x80000>; }; partition@180000 { label = "recovery"; reg = <0x180000 0xa80000>; }; partition@c00000 { label = "fit"; reg = <0xc00000 0x1400000>; }; }; }; spi_nand@1 { compatible = "spi-nand"; reg = <1>; spi-max-frequency = <52000000>; partitions { compatible = "fixed-partitions"; #address-cells = <1>; #size-cells = <1>; partition@0 { label = "bl2"; reg = <0x0 0x80000>; }; partition@80000 { label = "factory"; reg = <0x80000 0x300000>; }; partition@380000 { label = "fip"; reg = <0x380000 0x200000>; }; partition@580000 { label = "ubi"; reg = <0x580000 0x7a80000>; }; }; }; }; &watchdog { status = "disabled"; }; &mmc0 { pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins_default>; bus-width = <4>; max-frequency = <52000000>; cap-sd-highspeed; r_smpl = <1>; vmmc-supply = <®_3p3v>; vqmmc-supply = <®_3p3v>; status = "okay"; };