// SPDX-License-Identifier: (GPL-2.0+ OR MIT) // // Copyright 2021 Ronetix GmbH /dts-v1/; #include "imx7d.dtsi" / { model = "Ronetix iMX7-CM Board"; compatible = "ronetix,imx7-cm", "fsl,imx7d"; chosen { stdout-path = &uart1; }; /* DRAM size runtime extracted from the DDRC registers */ memory@80000000 { device_type = "memory"; reg = <0x80000000 0>; }; leds { compatible = "gpio-leds"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_gpio_leds>; led { label = "gpio-led"; gpios = <&gpio2 7 GPIO_ACTIVE_LOW>; }; }; reg_sd1_vmmc: regulator-sd1-vmmc { compatible = "regulator-fixed"; regulator-name = "VDD_SD1"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>; startup-delay-us = <200000>; off-on-delay-us = <20000>; enable-active-high; }; reg_usb_otg1_vbus: regulator-usb-otg1-vbus { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg1_pwr>; compatible = "regulator-fixed"; regulator-name = "usb_otg1_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; enable-active-high; }; reg_usb_otg2_vbus: regulator-usb-otg2-vbus { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usbotg2_pwr>; compatible = "regulator-fixed"; regulator-name = "usb_otg2_vbus"; regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; gpio = <&gpio1 7 GPIO_ACTIVE_HIGH>; enable-active-high; }; }; &clks { assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>, <&clks IMX7D_CLKO2_ROOT_DIV>; assigned-clock-parents = <&clks IMX7D_CKIL>; assigned-clock-rates = <0>, <32768>; }; &fec1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet1>; phy-mode = "rgmii-id"; phy-handle = <ðphy0>; fsl,magic-packet; status = "okay"; mdio { #address-cells = <1>; #size-cells = <0>; ethphy0: ethernet-phy@1 { compatible = "ethernet-phy-ieee802.3-c22"; reg = <1>; reset-gpios = <&gpio2 4 GPIO_ACTIVE_LOW>; reset-assert-us = <10000>; }; }; }; &qspi { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_qspi1_1>; status = "okay"; ddrsmp=<0>; flash0: mx25l25645g@0 { #address-cells = <1>; #size-cells = <1>; compatible = "jedec,spi-nor"; spi-max-frequency = <29000000>; reg = <0>; }; }; &i2c1 { clock-frequency = <100000>; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c1>; status = "okay"; pmic@8 { compatible = "fsl,pfuze3000"; reg = <0x08>; regulators { sw1a_reg: sw1a { regulator-min-microvolt = <700000>; regulator-max-microvolt = <3300000>; regulator-boot-on; regulator-always-on; regulator-ramp-delay = <6250>; }; /* use sw1c_reg to align with pfuze100/pfuze200 */ sw1c_reg: sw1b { regulator-min-microvolt = <700000>; regulator-max-microvolt = <1475000>; regulator-boot-on; regulator-always-on; regulator-ramp-delay = <6250>; }; sw2_reg: sw2 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <1850000>; regulator-boot-on; regulator-always-on; }; sw3a_reg: sw3 { regulator-min-microvolt = <900000>; regulator-max-microvolt = <1650000>; regulator-boot-on; regulator-always-on; }; swbst_reg: swbst { regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5150000>; }; snvs_reg: vsnvs { regulator-min-microvolt = <1000000>; regulator-max-microvolt = <3000000>; regulator-boot-on; regulator-always-on; }; vref_reg: vrefddr { regulator-boot-on; regulator-always-on; }; vgen1_reg: vldo1 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; vgen2_reg: vldo2 { regulator-min-microvolt = <800000>; regulator-max-microvolt = <1550000>; }; vgen3_reg: vccsd { regulator-min-microvolt = <2850000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; vgen4_reg: v33 { regulator-min-microvolt = <2850000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; vgen5_reg: vldo3 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; vgen6_reg: vldo4 { regulator-min-microvolt = <1800000>; regulator-max-microvolt = <3300000>; regulator-always-on; }; }; }; }; &i2c2 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_i2c2>; status = "okay"; }; &uart1 { /* console */ pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "okay"; }; &usbotg1 { vbus-supply = <®_usb_otg1_vbus>; status = "okay"; }; &usbotg2 { vbus-supply = <®_usb_otg2_vbus>; dr_mode = "host"; status = "okay"; }; /* SD card */ &usdhc1 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>, <&pinctrl_usdhc1_gpio>; pinctrl-1 = <&pinctrl_usdhc1_100mhz>, <&pinctrl_usdhc1_gpio>; pinctrl-2 = <&pinctrl_usdhc1_200mhz>, <&pinctrl_usdhc1_gpio>; cd-gpios = <&gpio5 0 GPIO_ACTIVE_HIGH>; bus-width = <4>; tuning-step = <2>; vmmc-supply = <®_sd1_vmmc>; wakeup-source; no-1-8-v; keep-power-in-suspend; status = "okay"; }; /* eMMC */ &usdhc3 { pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc3>; pinctrl-1 = <&pinctrl_usdhc3_100mhz>; pinctrl-2 = <&pinctrl_usdhc3_200mhz>; assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>; assigned-clock-rates = <400000000>; bus-width = <8>; no-1-8-v; fsl,tuning-step = <2>; non-removable; status = "okay"; }; &wdog1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_wdog>; fsl,ext-reset-output; status = "okay"; }; &iomuxc { pinctrl_i2c1: i2c1grp { fsl,pins = < MX7D_PAD_I2C1_SCL__I2C1_SCL 0x4000007f MX7D_PAD_I2C1_SDA__I2C1_SDA 0x4000007f >; }; pinctrl_i2c2: i2c2grp { fsl,pins = < MX7D_PAD_I2C2_SCL__I2C2_SCL 0x4000007f MX7D_PAD_I2C2_SDA__I2C2_SDA 0x4000007f >; }; pinctrl_enet1: enet1grp { fsl,pins = < MX7D_PAD_GPIO1_IO10__ENET1_MDIO 0x3 MX7D_PAD_GPIO1_IO11__ENET1_MDC 0x3 MX7D_PAD_ENET1_RGMII_TXC__ENET1_RGMII_TXC 0x1 MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x1 MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x1 MX7D_PAD_ENET1_RGMII_TD2__ENET1_RGMII_TD2 0x1 MX7D_PAD_ENET1_RGMII_TD3__ENET1_RGMII_TD3 0x1 MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x1 MX7D_PAD_ENET1_RGMII_RXC__ENET1_RGMII_RXC 0x1 MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x1 MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x1 MX7D_PAD_ENET1_RGMII_RD2__ENET1_RGMII_RD2 0x1 MX7D_PAD_ENET1_RGMII_RD3__ENET1_RGMII_RD3 0x1 MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x1 MX7D_PAD_EPDC_DATA04__GPIO2_IO4 0x14 /* ETH_RESET */ >; }; pinctrl_gpio_leds: gpioledsgrp { fsl,pins = < MX7D_PAD_EPDC_DATA07__GPIO2_IO7 0x14 >; }; pinctrl_uart1: uart1grp { fsl,pins = < MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX 0x59 MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX 0x59 >; }; pinctrl_usbotg1_pwr: usbotg_pwr { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO05__GPIO1_IO5 0x14 >; }; pinctrl_usbotg2_pwr: usbotg_pwr { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO07__GPIO1_IO7 0x14 >; }; pinctrl_usdhc1_gpio: usdhc1_gpiogrp { fsl,pins = < MX7D_PAD_SD1_CD_B__GPIO5_IO0 0x15 /* CD */ MX7D_PAD_SD1_RESET_B__GPIO5_IO2 0x59 /* Vmmc */ MX7D_PAD_GPIO1_IO08__SD1_VSELECT 0x59 /* VSELECT */ >; }; pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX7D_PAD_SD1_CMD__SD1_CMD 0x59 MX7D_PAD_SD1_CLK__SD1_CLK 0x19 MX7D_PAD_SD1_DATA0__SD1_DATA0 0x59 MX7D_PAD_SD1_DATA1__SD1_DATA1 0x59 MX7D_PAD_SD1_DATA2__SD1_DATA2 0x59 MX7D_PAD_SD1_DATA3__SD1_DATA3 0x59 >; }; pinctrl_usdhc1_100mhz: usdhc1grp_100mhz { fsl,pins = < MX7D_PAD_SD1_CMD__SD1_CMD 0x5a MX7D_PAD_SD1_CLK__SD1_CLK 0x1a MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5a MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5a MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5a MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5a >; }; pinctrl_usdhc1_200mhz: usdhc1grp_200mhz { fsl,pins = < MX7D_PAD_SD1_CMD__SD1_CMD 0x5b MX7D_PAD_SD1_CLK__SD1_CLK 0x1b MX7D_PAD_SD1_DATA0__SD1_DATA0 0x5b MX7D_PAD_SD1_DATA1__SD1_DATA1 0x5b MX7D_PAD_SD1_DATA2__SD1_DATA2 0x5b MX7D_PAD_SD1_DATA3__SD1_DATA3 0x5b >; }; pinctrl_usdhc3: usdhc3grp { fsl,pins = < MX7D_PAD_SD3_CMD__SD3_CMD 0x59 MX7D_PAD_SD3_CLK__SD3_CLK 0x19 MX7D_PAD_SD3_DATA0__SD3_DATA0 0x59 MX7D_PAD_SD3_DATA1__SD3_DATA1 0x59 MX7D_PAD_SD3_DATA2__SD3_DATA2 0x59 MX7D_PAD_SD3_DATA3__SD3_DATA3 0x59 MX7D_PAD_SD3_DATA4__SD3_DATA4 0x59 MX7D_PAD_SD3_DATA5__SD3_DATA5 0x59 MX7D_PAD_SD3_DATA6__SD3_DATA6 0x59 MX7D_PAD_SD3_DATA7__SD3_DATA7 0x59 >; }; pinctrl_usdhc3_100mhz: usdhc3grp_100mhz { fsl,pins = < MX7D_PAD_SD3_CMD__SD3_CMD 0x5a MX7D_PAD_SD3_CLK__SD3_CLK 0x1a MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5a MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5a MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5a MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5a MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5a MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5a MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5a MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5a >; }; pinctrl_usdhc3_200mhz: usdhc3grp_200mhz { fsl,pins = < MX7D_PAD_SD3_CMD__SD3_CMD 0x5b MX7D_PAD_SD3_CLK__SD3_CLK 0x1b MX7D_PAD_SD3_DATA0__SD3_DATA0 0x5b MX7D_PAD_SD3_DATA1__SD3_DATA1 0x5b MX7D_PAD_SD3_DATA2__SD3_DATA2 0x5b MX7D_PAD_SD3_DATA3__SD3_DATA3 0x5b MX7D_PAD_SD3_DATA4__SD3_DATA4 0x5b MX7D_PAD_SD3_DATA5__SD3_DATA5 0x5b MX7D_PAD_SD3_DATA6__SD3_DATA6 0x5b MX7D_PAD_SD3_DATA7__SD3_DATA7 0x5b >; }; pinctrl_qspi1_1: qspi1grp_1 { fsl,pins = < MX7D_PAD_EPDC_DATA00__QSPI_A_DATA0 0x51 MX7D_PAD_EPDC_DATA01__QSPI_A_DATA1 0x51 MX7D_PAD_EPDC_DATA02__QSPI_A_DATA2 0x51 MX7D_PAD_EPDC_DATA03__QSPI_A_DATA3 0x51 MX7D_PAD_EPDC_DATA05__QSPI_A_SCLK 0x51 MX7D_PAD_EPDC_DATA06__QSPI_A_SS0_B 0x51 >; }; }; &iomuxc_lpsr { pinctrl_wdog: wdoggrp { fsl,pins = < MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x74 >; }; };