// SPDX-License-Identifier: GPL-2.0+ // Copyright (C) 2021 Oleh Kravchenko /dts-v1/; #include "o4-imx6ull-nano.dtsi" / { model = "EV-iMX280-NANO-X-MB"; compatible = "evodbg,ev-imx280-nano-x-mb", "out4,o4-imx6ull-nano", "fsl,imx6ull"; aliases { mmc1 = &usdhc1; }; chosen { stdout-path = &uart1; }; }; &iomuxc { pinctrl_uart1: uart1grp { fsl,pins = < MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1 MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 >; }; pinctrl_usdhc1: usdhc1grp { fsl,pins = < MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10069 MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_DATA0__USDHC1_DATA0 0x17059 MX6UL_PAD_SD1_DATA1__USDHC1_DATA1 0x17059 MX6UL_PAD_SD1_DATA2__USDHC1_DATA2 0x17059 MX6UL_PAD_SD1_DATA3__USDHC1_DATA3 0x17059 MX6UL_PAD_UART1_RTS_B__USDHC1_CD_B 0x03029 >; }; pinctrl_mdio: mdiogrp { fsl,pins = < MX6UL_PAD_GPIO1_IO06__ENET1_MDIO 0x1b0b0 MX6UL_PAD_GPIO1_IO07__ENET1_MDC 0x1b0b0 MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0xb0b0 /* RST */ >; }; pinctrl_usb_otg1_id: usbotg1idgrp { fsl,pins = < MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID 0x17059 >; }; }; &uart1 { pinctrl-0 = <&pinctrl_uart1>; pinctrl-names = "default"; status = "okay"; }; &usdhc1 { bus-width = <4>; no-1-8-v; pinctrl-0 = <&pinctrl_usdhc1>; pinctrl-names = "default"; status = "okay"; wakeup-source; }; &fec1 { phy-handle = <&phy0>; phy-mode = "rmii"; phy-reset-duration = <250>; phy-reset-post-delay = <100>; phy-reset-gpios = <&gpio5 1 GPIO_ACTIVE_LOW>; pinctrl-0 = <&pinctrl_fec1 &pinctrl_mdio>; pinctrl-names = "default"; status = "okay"; mdio { #address-cells = <1>; #size-cells = <0>; phy0: ethernet-phy@0 { clocks = <&clks IMX6UL_CLK_ENET_REF>; clock-names = "rmii-ref"; interrupt-parent = <&gpio5>; interrupts = <7 IRQ_TYPE_EDGE_FALLING>; pinctrl-0 = <&pinctrl_phy0_irq>; pinctrl-names = "default"; reg = <0>; }; }; }; &usbotg1 { dr_mode = "otg"; pinctrl-0 = <&pinctrl_usb_otg1_id>; pinctrl-names = "default"; status = "okay"; }; &usbotg2 { dr_mode = "host"; status = "okay"; };